FPMM - FPGA-Based Prototyping Methodology Manual
FPMM – FPGA-Based Prototyping Methodology Manual Click on the above link to download FPGA-Based Prototyping Methodology Manual. View Post
FPGA Synthesis for Dummies
Introduction Generic definition of Synthesis by Princeton University dictionary The combination of ideas into a complex whole. Even our FPGA synthesis tool does exactly that. It combines our ideas (logic description) written in HDL into macros available… View Post shared via WordPress.com
Is System Verilog useful for FPGA Design ?
I’m sure there are many FPGA Designers who are intrigued by System Verilog & its use for FPGA Design. I recently bumped into this article regarding System Verilog for FPGA Design. This paper is NOTa tutorial on System Verilog, it is a survey and the… View Post shared via WordPress.com
Carrer in FPGA : India
I’ve seen a lot of forums where students undergoing undergraduate courses and fresh graduates in Electronics ask queries related to entry into VLSI/FPGA domain. I recently stumbled across this article titled “How to Get Into FPGA” by Electronics For You… View Post shared via WordPress.com
Electronic Voting Machines using FPGA
This is an interesting subject to make Voting tamper proof. Such real-world applications reaching the common-man would make FPGA’s more popular. Click on link below. Keeping Voting Honest Through FPGAs | FPGA Gurus. (more…) View Post shared via WordPress.com
FPGA Blog on Wordpress →
I’ve paralleled ‘FPGA Blog’ to a new address hosted by Wordpress to increase outreach. Do visit http://fpgaconcepts.wordpress.com/ I’ll continue to duplicate posts in both the blogs.
Hilbert Transform in FPGA
Introduction Most of you familiar with signal processing would’ve heard the term Hilbert Transform. We’ll call it HT from here on. There are other transform in DSP like Laplace, Fourier, Z etc which are more popular & used across multiple domains. Basically transform, as the word suggests is a mathematical process which converts one form of signal to another. Some are used only for...
FPGA FFT Architectures
This post has deliberately come after a long gap as there are other blogs like the recently launched Programmable Planet which is far superior in content and substance. Fast Fourier Transforms are almost ubiquitous for anyone dealing with signal processing & communications systems. Time domain analysis doesn’t provide us much required information as signal processing mostly relies on...
Random trivia about Computing
We know some computers use 64-bit words. 2^64 is approximately 1.8 x 10^18 - that’s a pretty large number. So in fact if we started incrementing a 64-bit counter once per second at the beginning of the universe (20 billion yrs ago), the MSB’s of the counter would still be all zeroes. ~ Excerpts from a book on Digital Signal Processing
Website for FPGA Developers
There is limited & scattered knowledge available in the programmable logic space online. I recently stumbled upon Programmable Planet, a website dedicated to Programmable Devices. Programmable planet is undoubtedly emerging as the best online resource for “all things programmable” as they call it. It has FPGA, VHDL concepts explained by industry experts - now that’s...
FPGA Blog featured on EEWeb
FPGA Blog was featured on EEWeb.com as Site of the Day on 9th June. Here’s the permalink to the site http://www.eeweb.com/websites/fpga-blog/
Xilinx Configurable Logic Block
Configurable Logic Blocks (CLB) are programmable elements inside a Xilinx FPGA. The figure shown below depicts FPGA Device fabric which is made up of several CLB’s (Snapshot taken from Xilinx PlanAhead Tool). Each of those boxes inscribed in blue are CLB’s which consists of slices & other components. Virtex-5 CLB A Virtex-5 CLB Tile consists of 2 SLICES. Figure depicts each...
I’ve already emphasized about the coolness of Notepad++ (NPP) for VHDL editing. You can find those posts here & here. This post is about must have Notepad++ Plugins. All plugins can be downloaded from sourceforge.net. You need to manually add the *.dll file into the plugin directory of Notepad++ installation folder. You can alternatively go to Plugin Menu & open Plugin Manager...
FPGA DSP Slices
The concept of utilizing FPGAs for DSP operations is fairly well understood, established, and recognized within the signal processing industry. FPGA’s have DSP slices to implement signal processing functions. The DSP operation most commonly used is Multiply-Accumulate or MAC operation. A MAC block is also used as a building block for more complex DSP applications like filtering. FPGA DSP...
India VLSI Design Services Study 2012 →
You should read this if you’re working in VLSI or keen to join a VLSI design services firm. Click on Heading or this link.
FPGA Course for Beginners →
Click on the “Title” for a ‘free’ FPGA course. Yes there is awesome free stuff available on the internet. Kudos to the creators of the page.
Arithmetic Operations using Xilinx FPGA
We often use basic arithmetic operations for synthesis - adders, multipliers & sometimes the division operation. Some useful tips while using arithmetic operators: It is always recommended to use advanced options for synthesis in XST like “Use Mult”, “Use DSP” while using arithmetic operations. Check for customizable IP Cores. Most arithmetic operations are covered...
Fascinating Trivia on Decimation
The original meaning of “decimation” was that the Roman general killed one out of every ten centurions, as a way to instill order through fear. The same concept is used in the concept of Decimation used often in Signal Processing & VLSI terminologies. In signal processing decimation implies downsampling. In decimation we take 1 out of ‘N’ samples where N is the...
There are 4 timing paths we need to analyze in a sequential circuit Input-Clock path Clock-Clock path Clock-Output path Input-Output path For more updates on timing, watch this space.
Timing Hazards & Glitches
Timing hazards are fluctuations occurring during transient period i.e before output reaches steady state value. These fluctuations cause very short/narrow pulses called glitches. Circuit is said to have timing hazards if it has glitches. Timing hazards can be either static or dynamic. Dynamic hazards occur when the output produces a L->H or H->L transition. Multiple 1-bit changes...
Xilinx's Vivado Design Suite
It seems Xilinx has released a new Design Suite for FPGA & SoC designs. Is it an ISE replacement? They came out with a press release last week. Check this link : http://bit.ly/K1yMB2 Watch this space for more :)
FPGA File Management Tip
Tips to save disk space Xilinx ISE: Manual Copy of Sources While migrating from one design to another copy ONLY the source files like vhd, ucf, xco, cdc files (xco refers to Xilinx Coregen file & cdc is related to Chipscope pro). If there are filters don’t forget to move the .coe & .mif Other files can be ignored while manually copying as they are the generated files after...
Xilinx Synthesis Technology - XST Components
Your VHDL/Verilog code gets synthesized into one of the following Xilinx FPGA components List of XST specific components Carry logic - MUXCY, XORCY, MULT_AND RAM - Block, Distributed Shift Register LUTs - SRL16, SRL32 Clock Buffers - IBUFG, BUFG, BUFGP, BUFR Multiplexers - MUXF5, MUXF6, MUXF7, MUXF8 Arithmetic Functions - DSP48, MULT18x18 - Courtesy of Xilinx ISE Help Topics
First 22nm FPGA →
Industry’s first 22 nm FPGA has come. No its not from Xilinx or Altera. Achronix has created 22 nm FPGA’s using Intel’s fab. They’ve challenged the BIG 2 of FPGA world. Achronix doesn’t even have a Wikipedia entry. Kudos to Achronix. Check the link for more details.
FPGA Distributed RAM
FPGA’s contain Block RAM (BRAM) & Distributed RAMs (DRAM). BRAM’s are dedicated memory blocks. Each FPGA has them. FPGA datasheets typically specify the Total BRAM in Kbits. DRAM’s are RAM’s that can be constructed using Look-Up-Tables (LUT). SRAM based FPGA’s have LUTs. These LUTs can be used as a small block of RAM by combining cells; called DRAMs. This...
XOR Gate is a 1-bit ADDER XNOR Gate is a 1-bit COMPARATOR.– Digital Design Tip
EDIF Netlist is always device independent– FPGA Tip
VHDL Tip : Use Integer Range Check
Integer has a range from -(2**31)-1 to (2**31)-1 but rarely do we use that range. I would recommend to always declare integer with a Range as shown below. Example Integer Declaration: The range 0 to 1E3 acts as a RANGE CHECK. It does NOT refer to the memory to be allocated for integer. If you exceed the range, simulator shows an error. I checked with ModelSim & it issues a fatal error.
DO-254 for FPGA Designer - White Paper by Xilinx... →
There’s finally a standard for FPGA designers to tackle Sigle Event Upsets & other problems. It is based on DO-178B which is a software standard. Title is DO-254 Design Assurance Guidance for Airborne Electronic Hardware & published by RTCA Inc. Here’s a link to a White Paper published by Xilinx
Notepad++ Compare Plugin
I came across this additional plugin for Notepad++ which is very efficient. Compares 2 files with highlighting & status flags. Can also compare to file on SVN base. Here’s a link to the plugin. Just add the *.dll file into the plugin directory of Notepad++ Here’s the link to NPP-Compare plugin http://sourceforge.net/projects/npp-compare/ I’ve written about Notepad++...
Summary of FPGA development boards →
This link provides a list of some entry-level FPGA boards. They all work with the free software from the FPGA vendors.
Terminal Client for Serial Communication
We often work with serial communication (RS232) which requires a COM port & a software application which can interpret UART protocol. Hyperterminal is one such application which can be used to read/write data from/to serial ports. Hyperterminal is available as a default application in Windows PC which can be located in Start -> Programs -> Accessories -> Communication ->...
Xilinx ISE Source Files List (click to open) →
The table shows the source file types that appear in the Project Navigator Sources tab.Available source types vary depending on your project properties (top-level module type, device type, synthesis tool, and language). The last column describes what to expect when creating the file with the New Source wizard and, if applicable, includes the tool launched when using the New Source wizard or when...
SVN for FPGA projects
For FPGA projects with many designers in a team it’s always better to have a sub-version control system. For software projects its pretty simple to add the source files like .c, .h etc. but FPGA designs typically have many input & output files. Here are the files I keep on SVN. I use Tortoise SVN with Xilinx ISE by keeping the following source...
"Hello World" equivalent on FPGA - Beginner...
Every programming book begins with “Hello World” as the first code. The hardware equivalent of “Hello World” would be “Glowing LED’s” Here’s what you’ll need 1. FPGA Board with User LED’s (duh) 2. USB programming cable or JTAG programmer 3. Design software by FPGA vendor Choose an HDL Language & simulator. I used VHDL with...
FPGA Clock Schemes →
This (click on Heading) is a brilliant article on FPGA Clocking by Tim Behne. Originally appeared in EETimes. Notes —> Skew is MAXIMUM delay from clk input of one FF to clk input of another FF Skew < Propagation Time between two FFs for clock to work properly FPGA’s have low skew resources. Use them.
FPGA Development Flow Output files & Reports
This block diagram shows output files/reports at each stage of FPGA Development. However, this chart is specific to Xilinx FPGA’s. (Image courtesy of Xilinx Inc)
The short term phase variation of the significant instants of a digital signal...– NIST definition of Jitter
FPGA Micro Kit
If you’re really keen on experimenting with FPGA’s its time you own one now. There are many micro-kits available in the market which are inexpensive, have good documentation, come with FPGA programming software’s, and don’t require JTAG programmers (they usually come with USB to JTAG converters). If you’re fortunate enough to work with kits provided by...
I’ve seen many sites with queries on VHDL Editors. I’ll list a few of them here. These are NOT IDE’s. Notepad++ with VHDL plugin - Works amazingly well on Windows. Its a very lightweight program. Pros : fullscreen option, code folding, good color schemes Cons: no in-built VHDL templates gVIM & Emacs if you swear by UNIX Sigasi HDT - Eclipse based environment ...
VHDL Free E-Book
Here’s the link for a free VHDL E-Book http://t.co/UEX9NMSJ I would also recommend to download the VHDL Quick Reference from Synthworks. Happy Coding :)
Prerequisites to FPGA Design
You’ll need fairly good know-how in Boolean Algebra Digital Circuits Hardware Description Language or HDL like VHDL/Verilog Coding in a programming language like C for rendering ideas into syntax and a lot of Patience.
There can’t be a blog about Programmable Logic without defining a logic gate right? I found this definition in a book I read about a year back & it stuck to my head. Gate is a circuit with multiple inputs and one output that is energized only when a designated set of input pulses is received. Image Courtesy of Deviantart.com user ~jsoaresgeral