FPGA Blog

FPMM - FPGA-Based Prototyping Methodology Manual

Tue, 30 Apr 2013 22:18:42 +0530

FPMM – FPGA-Based Prototyping Methodology Manual

Click on the above link to download FPGA-Based Prototyping Methodology Manual.

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Fast Fourier Transforms & ChipscopeMany of you working in...

Mon, 07 Jan 2013 17:48:14 +0530

Fast Fourier Transforms & Chipscope

Many of you working in signal processing would be using Fast Fourier Transforms (FFT). This post…

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FPGA Design Flow Taken from an excellent introductory book on...

Fri, 04 Jan 2013 10:27:35 +0530

FPGA Design Flow

Taken from an excellent introductory book on FPGA’s titled “FPGA’s Now What“

Image Courtesy of…

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FPGA Synthesis for Dummies

Sat, 22 Dec 2012 12:54:32 +0530

Introduction

Generic definition of Synthesis by Princeton University dictionary

The combination of ideas into a complex whole.

Even our FPGA synthesis tool does exactly that.

It combines our ideas (logic description) written in HDL into macros available…

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VHDL Edge Detection - Rising Edge vs Tick Event Edge detection...

Fri, 21 Dec 2012 11:25:19 +0530

VHDL Edge Detection - Rising Edge vs Tick Event

Edge detection is widely used to detect clock edges. Data transfer happens during the rising and…

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Is System Verilog useful for FPGA Design ?

Tue, 27 Nov 2012 10:33:23 +0530

I’m sure there are many FPGA Designers who are intrigued by System Verilog & its use for FPGA Design.

I recently bumped into this article regarding System Verilog for FPGA Design. This paper is NOTa tutorial on System Verilog, it is a survey and the…

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Carrer in FPGA : India

Sat, 10 Nov 2012 20:51:05 +0530

I’ve seen a lot of forums where students undergoing undergraduate courses and fresh graduates in Electronics ask queries related to entry into VLSI/FPGA domain.

I recently stumbled across this article titled “How to Get Into FPGA” by Electronics For You…

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Electronic Voting Machines using FPGA

Fri, 09 Nov 2012 10:40:22 +0530

This is an interesting subject to make Voting tamper proof. Such real-world applications reaching the common-man would make FPGA’s more popular. Click on link below.

Keeping Voting Honest Through FPGAs | FPGA Gurus.

(more…)

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FPGA Blog on Wordpress

Fri, 02 Nov 2012 10:29:00 +0530

FPGA Blog on Wordpress: I’ve paralleled ‘FPGA Blog’ to a new address hosted by Wordpress to increase outreach.

Do visit http://fpgaconcepts.wordpress.com/

I’ll continue to duplicate posts in both the blogs.

Hilbert Transform in FPGA

Thu, 01 Nov 2012 16:37:00 +0530

Introduction

Most of you familiar with signal processing would’ve heard the term Hilbert Transform. We’ll call it HT from here on. There are other transform in DSP like Laplace, Fourier, Z etc which are more popular & used across multiple domains. Basically transform, as the word suggests is a mathematical process which converts one form of signal to another. Some are used only for purely analytic purposes (Fourier) while some are used for real-time signal processing like Hilbert.

HT ‘transforms’ the phase of the signal. It performs a phase shift of -90°. Yes you read it right, it is negative 90° phase shift. Generally, it is mentioned as a 90° phase shift without explicitly mentioning positive or negative shift. The reason is due to the concept of positive & negative frequencies. HT would phase shift positive frequency component by -90° while a negative frequency would be shifted by +90°.

Where could we use HT?

I’m sure there are multiple uses but the one I’m aware of is Quadrature processing. The term quadrature processing refers to dealing with In-phase, Quadrature-phase signals, i.e I,Q signals. I,Q signals are used for modulation & demodulation techniques. Quadrature modulation/demodulation offers many advantages over conventional approaches which can be discussed in another post.

For example, SSB demodulation by phasing method uses Hilbert transform to phase shift the incoming modulated signal to -90°.

FPGA Implementation (Xilinx)

Hilbert transformers can be easily implemented in Xilinx FPGA’s using FIR compiler IP. HT coefficients can be generated using Matlab FDA Tool. It is important to note that the Hilbert coefficient structure should contain alternate zeroes for FIR compiler to infer the filter as a Hilbert Structure.

Snapshot shows Hilbert Transformer using FDA Tool.

Generated Coefficients for Hilbert transformer

As you can see, every alternate coefficient is zero valued, which the FIR compiler infers as a Hilbert Filter structure.

FIR IP Core generates I, Q output (dout_i, dout_q in IP symbol) if the Hilbert structure is inferred properly. The output is -90° phase shifted. HT of cosine is sine and HT of sine is -cosine

HT is predominantly used in quadrature Signal Processing.

FPGA FFT Architectures

Sat, 29 Sep 2012 11:37:00 +0530

This post has deliberately come after a long gap as there are other blogs like the recently launched Programmable Planet which is far superior in content and substance.

Fast Fourier Transforms are almost ubiquitous for anyone dealing with signal processing & communications systems. Time domain analysis doesn’t provide us much required information as signal processing mostly relies on frequency domain techniques like modulation, up/downconversion, filtering. In short FFT is required in almost every design for either on-line or off-line analysis. For example, Peak search/scan is generally performed in spectral domain.

Xilinx Fast Fourier Transform IP Core provides 4 architectures. There is obviously a trade-off between speed (performance) & area.

I’ve considered an example of 64k (65536) transform length clocked at 100 MSPS & target data rate of 100 MSPS. Table shows the theoretical latency & resource estimates provided by Xilinx IP core.

From the table, the trade-off vis-a-vis FPGA Architectures is clear.

Random trivia about Computing

Wed, 11 Jul 2012 15:43:00 +0530

We know some computers use 64-bit words.

2^64 is approximately 1.8 x 10^18 - that’s a pretty large number.

So in fact if we started incrementing a 64-bit counter once per second at the beginning of the universe (20 billion yrs ago), the MSB’s of the counter would still be all zeroes.

~ Excerpts from a book on Digital Signal Processing

Website for FPGA Developers

Wed, 27 Jun 2012 19:00:36 +0530

There is limited & scattered knowledge available in the programmable logic space online. I recently stumbled upon Programmable Planet, a website dedicated to Programmable Devices.

Programmable planet is undoubtedly emerging as the best online resource for “all things programmable” as they call it. It has FPGA, VHDL concepts explained by industry experts - now that’s something new. These experts are very much active in the website & available for comments/clarifications.

If you haven’t gone through Programmable Planet, I suggest you do it right away.

Here’s the permalink —> http://bit.ly/MTNMAR

FPGA Blog featured on EEWeb

Mon, 11 Jun 2012 18:32:16 +0530

FPGA Blog was featured on EEWeb.com as Site of the Day on 9th June. Here’s the permalink to the site http://www.eeweb.com/websites/fpga-blog/

Xilinx Configurable Logic Block

Tue, 05 Jun 2012 18:06:00 +0530

Configurable Logic Blocks (CLB) are programmable elements inside a Xilinx FPGA.

The figure shown below depicts FPGA Device fabric which is made up of several CLB’s (Snapshot taken from Xilinx PlanAhead Tool). Each of those boxes inscribed in blue are CLB’s which consists of slices & other components.

Virtex-5 CLB

A Virtex-5 CLB Tile consists of 2 SLICES. Figure depicts each CLB tile consisting of 2 slices. The components have been labelled for better understanding.

The above snapshot is taken from PlanAhead tool which is part of ISE Design Suite System Edition.

Each slice in a CLB consists of a 6 input LUT, Multiplexers (2:1), Carry logic made up of MUX & XOR gates, and D-Flip flops. All our logic gets mapped into these components using synthesis algorithms.

For more on FPGA architectures watch this space.

Notepad++ Plugins

Mon, 04 Jun 2012 19:23:00 +0530

I’ve already emphasized about the coolness of Notepad++ (NPP) for VHDL editing. You can find those posts here & here.

This post is about must have Notepad++ Plugins. All plugins can be downloaded from sourceforge.net. You need to manually add the *.dll file into the plugin directory of Notepad++ installation folder. You can alternatively go to Plugin Menu & open Plugin Manager which shows the list of available plugins & you can install directly.

Must Have NPP Plugins List

NPP VHDL - supports templates for Entity, signal declaration, test bench & port instantiation.
NPP Compare
MultiClipboard
Xbrackets lite - auto closing of brackets
NPP Export

How to download NPP Plugins?

All plugins can be downloaded from sourceforge.net.

You need to manually add the *.dll file into the plugin directory of Notepad++ installation folder. You can alternatively go to Plugin Menu & open Plugin Manager which shows the list of available plugins & you can install directly.

These are really powerful plugins once you start using them.

I’ll post about other interesting plugins once I find them. Watch this space for more.

FPGA DSP Slices

Wed, 30 May 2012 00:03:00 +0530

The concept of utilizing FPGAs for DSP operations is fairly well understood, established, and recognized within the signal processing industry.

FPGA’s have DSP slices to implement signal processing functions. The DSP operation most commonly used is Multiply-Accumulate or MAC operation. A MAC block is also used as a building block for more complex DSP applications like filtering.

FPGA DSP slice essentially implements a MAC operation.

Xilinx calls this slice “XtremeDSP DSP48”. (probably because it handle a maximum of 48-bit addition)

Image illustrates DSP48E used in Virtex-5 devices & its features (Courtesy of Xilinx Inc)

There are 3 variants of DSP slices used in Xilinx FPGA’s- DSP48A, DSP48 & DSP48E.

(Image Courtesy of Xilinx Inc)

Xilinx has a good number of DSP elements in FPGA devices with SX series.

For more info on Comparison of conventional DSP processing vis-a-vis FPGA-based DSP watch this space.

India VLSI Design Services Study 2012

Mon, 28 May 2012 09:55:00 +0530

India VLSI Design Services Study 2012:

You should read this if you’re working in VLSI or keen to join a VLSI design services firm.

Click on Heading or this link.

FPGA Course for Beginners

Fri, 25 May 2012 19:47:43 +0530

FPGA Course for Beginners:

Click on the “Title” for a ‘free’ FPGA course.

Yes there is awesome free stuff available on the internet. Kudos to the creators of the page.

Arithmetic Operations using Xilinx FPGA

Fri, 25 May 2012 15:37:00 +0530

We often use basic arithmetic operations for synthesis - adders, multipliers & sometimes the division operation.

Some useful tips while using arithmetic operators:

It is always recommended to use advanced options for synthesis in XST like “Use Mult”, “Use DSP” while using arithmetic operations.
Check for customizable IP Cores. Most arithmetic operations are covered in FPGA vendor specific IP’s.
However if you wish to use +,*,/ operators you will need to include libraries which define these operators.

Table shows VHDL Libraries needed to be added for specific arithmetic operations